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ht1625 ram mapping 64 8 lcd controller for i/o mcu selection table ht162x ht1620 ht1621 ht1622 ht16220 ht1623 ht1625 ht1626 com 44888 8 16 seg 32 32 32 32 48 64 48 built-in osc. crystal osc. block diagram rev. 1.10 1 september 11, 2002 features operating voltage: 2.7v~5.2v built-in rc oscillator external 32.768khz crystal or 32khz frequency source input 1/4 bias, 1/8 duty, frame frequency is 64hz max. 64 8 patterns, 8 commons, 64 segments built-in internal resistor type bias generator 3-wire serial interface 8 kinds of time base or wdt selection time base or wdt overflow output built-in lcd display ram r/w address auto increment two selectable buzzer frequencies (2khz or 4khz) power down command reduces power consumption software configuration feature data mode and command mode instructions three data accessing modes vlcd pin to adjust lcd operating voltage cascade application 100-pin qfp package general description ht1625 is a peripheral device specially designed for i/o type mcu used to expand the display capability. the max. display segment of the device are 512 patterns (64 8). it also supports serial interface, buzzer sound, watchdog timer or time base timer functions. the ht1625 is a memory mapping and multi-function lcd controller. the software configuration feature of the ht1625 make it suitable for multiple lcd applications including lcd modules and display subsystems. only three lines are required for the interface between the host controller and the ht1625. the ht162x series have many kinds of products that match various applica - tions.

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pin assignment ht1625 rev. 1.10 2 september 11, 2002
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pad assignment chip size: 192 211 (mil) 2 * the ic substrate should be connected to vdd in the pcb layout artwork. ht1625 rev. 1.10 3 september 11, 2002 - . / , . % & . # . . 0 / . 1 % / " # / - 0 / , 1 / & - " / . - - / / - , / % - & / # - . / 0 - / / 1 - % % " - # % - - 0 % , - 1 % & , " % . , - % / , , % % , & % # , . % 0 , / % 1 , % # " , # # - , 0 # , , 1 # & & " # . & - # / & , # % & & # # & . # 0 & / # 1 & % 0 " & # 0 - & 0 0 , & 1 0 & . " 0 . . - 0 / . , 0 % . & 0 # . . 3 " 4 " 5
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& " - , & . / % # $ " $ - $ , $ & $ . $ / $ % $ # $ 0 $ 1 $ - " $ - - $ - , $ - & $ - . $ - / $ - % $ - # $ - 0 $ - 1 $ , " $ , - $ , , $ , & $ , / $ , . $ , % $ , # $ , 0 $ , 1 $ & " $ & - $ & , $ & & $ & . $ & / $ & % $ & # $ & 0 $ & 1 $ . " $ . - $ . , $ . & $ . . $ . / $ . % $ . # $ . 0 $ . 1 $ / " $ / - $ / , $ / & $ / . $ / / $ / % $ / # $ / 0 $ / 1 $ % " $ % - $ % , $ % & ! + )
pad coordinates unit: mil pad no. x y pad no. x y 1 90.18 98.56 45 90.57 84.53 2 90.18 91.93 46 90.57 77.90 3 90.18 85.30 47 89.80 68.13 4 90.18 75.95 48 89.80 61.50 5 89.42 57.76 49 89.80 49.51 6 89.42 45.77 50 89.80 42.88 7 90.18 39.14 51 89.80 30.90 8 90.18 32.51 52 89.80 24.27 9 90.18 25.03 53 89.80 12.28 10 90.18 15.94 54 89.80 5.65 11 90.18 5.82 55 89.80 6.33 12 90.18 3.61 56 89.80 12.96 13 90.18 10.24 57 89.80 24.95 14 90.18 16.87 58 89.80 31.58 15 90.18 23.50 59 89.80 43.56 16 90.18 30.13 60 89.80 50.19 17 90.18 36.76 61 89.80 62.18 18 90.18 43.39 62 89.80 68.81 19 90.18 92.22 63 89.80 80.79 20 83.17 99.53 64 89.80 87.42 21 76.54 99.53 65 89.38 98.22 22 69.91 99.53 66 77.39 98.22 23 63.28 99.53 67 70.76 98.22 24 56.65 99.53 68 58.78 98.22 25 50.02 99.53 69 52.15 98.22 26 43.39 99.53 70 40.16 98.22 27 36.76 99.53 71 32.09 99.32 28 30.13 99.53 72 25.46 99.32 29 23.50 99.53 73 18.83 99.32 30 16.87 99.53 74 12.20 99.32 31 10.24 99.53 75 5.57 99.32 32 3.61 99.53 76 1.06 99.32 33 3.02 99.53 77 7.69 99.32 34 9.65 99.53 78 14.32 99.32 35 16.28 99.53 79 20.95 99.32 36 22.91 99.53 80 27.58 99.32 37 29.54 98.60 81 34.21 99.32 38 41.52 98.60 82 40.84 99.32 39 48.15 98.60 83 47.47 99.32 40 60.14 98.60 84 54.10 99.32 41 66.77 98.60 85 60.73 99.32 42 78.75 98.60 86 67.36 99.32 43 90.57 97.79 87 73.99 99.32 44 90.57 91.16 ht1625 rev. 1.10 4 september 11, 2002
pad description pad no. pad name i/o description 1rd i read clock input with pull-high resistor. data in the ram of the ht1625 are clocked out on the falling edge of the rd signal. the clocked out data will ap - pear on the data line. the host controller can use the next rising edge to latch the clocked out data. 2wr i write clock input with pull-high resistor. data on the data line are latched into the ht1625 on the rising edge of the wr signal. 3 data i/o serial data input or output with pull-high resistor 4 vss negative power supply, ground 5 osci i the osci and osco pads are connected to a 32.768khz crystal in order to generate a system clock. if the system clock comes from an external clock source, the external clock source should be connected to the osci pad. but if an on-chip rc oscillator is selected instead, the osci and osco pads can be left open. 6 osco o 7 vdd positive power supply 8 vlcd i lcd operating voltage input pad. 9 irq o time base or watchdog timer overflow flag, nmos open drain output 10, 11 bz, bz o 2khz or 4khz tone frequency output pair 12~14 t1~t3 i not connected 15~22 com0~com7 o lcd common outputs 23~86 seg0~seg63 o lcd segment outputs 87 cs i chip selection input with pull-high resistor. when the cs is logic high, the data and command read from or write to the ht1625 are disabled. the serial interface circuit is also reset. but if the cs is at logic low level and is input to the cs pad, the data and command transmission between the host controller and the ht1625 are all enabled. absolute maximum ratings supply voltage ......................................... 0.3v to 5.5v storage temperature ............................ 50 cto125 c input voltage.............................v ss 0.3v to v dd +0.3v operating temperature........................... 25 cto75 c note: these are stress ratings only. stresses exceeding the range specified under absolute maximum ratings may cause substantial damage to the device. functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil - ity. ht1625 rev. 1.10 5 september 11, 2002
d.c. characteristics ta=25 c symbol parameter test conditions min. typ. max. unit v dd conditions v dd operating voltage 2.7 5.2 v i dd1 operating current 3v no load or lcd on on-chip rc oscillator 155 310 a 5v 260 420 a i dd2 operating current 3v no load or lcd on crystal oscillator 150 310 a 5v 250 420 a i dd11 operating current 3v no load or lcd off on-chip rc oscillator 830 a 5v 20 60 a i dd22 operating current 3v no load or lcd off crystal oscillator 20 a 5v 35 a i stb standby current 3v no load, power down mode 112 a 5v 224 a v il input low voltage 3v data, wr ,cs ,rd 0 0.6 v 5v 0 1.0 v v ih input high voltage 3v data, wr ,cs ,rd 2.4 3v 5v 4.0 5v i ol1 bz, bz , irq 3v v ol =0.3v 0.9 1.8 ma 5v v ol =0.5v 1.7 3 ma i oh1 bz, bz 3v v oh =2.7v 0.9 1.8 ma 5v v oh =4.5v 1.7 3 ma i ol1 data 3v v ol =0.3v 0.9 1.8 ma 5v v ol =0.5v 1.7 3 ma i oh1 data 3v v oh =2.7v 0.9 1.8 ma 5v v oh =4.5v 1.7 3 ma i ol2 lcd common sink current 3v v ol =0.3v 80 160 a 5v v ol =0.5v 180 360 a i oh2 lcd common source current 3v v oh =2.7v 40 80 a 5v v oh =4.5v 90 180 a i ol3 lcd segment sink current 3v v ol =0.3v 50 100 a 5v v ol =0.5v 120 240 a i oh3 lcd segment source current 3v v oh =2.7v 30 60 a 5v v oh =4.5v 70 140 a r ph pull-high resistor 3v data, wr ,cs ,rd 100 200 300 k 5v 50 100 150 k ht1625 rev. 1.10 6 september 11, 2002
a.c. characteristics ta=25 c symbol parameter test conditions min. typ. max. unit v dd conditions f sys1 system clock 3v on-chip rc oscillator 22 32 40 khz 5v 24 32 40 khz f sys2 system clock 3v external clock source 32 khz 5v 32 khz f lcd1 lcd frame frequency 3v on-chip rc oscillator 44 64 80 hz 5v 48 64 80 hz f lcd2 lcd frame frequency 3v external clock source 64 hz 5v 64 hz t com lcd common period n: number of com n/f lcd sec f clk1 serial data clock (wr pin) 3v duty cycle 50% 150 khz 5v 300 khz f clk2 serial data clock (rd pin) 3v duty cycle 50% 75 khz 5v 150 khz t cs serial interface reset pulse width (figure 3) cs 250 ns t clk wr ,rd input pulse width (figure 1) 3v write mode 3.34 s read mode 6.67 5v write mode 1.67 s read mode 3.34 t r ,t f rise or fall time serial data clock width (figure 1) 3v 120 ns 5v tsu setup time for data to wr ,rd clock width (figure 2) 3v 120 ns 5v t h hold time for data to wr ,rd clock width (figure 2) 3v 120 ns 5v t su1 setup time for cs to wr ,rd clock width (figure 3) 3v 100 ns 5v t h1 hold time for cs to wr ,rd clock width (figure 3) 3v 100 ns 5v ht1625 rev. 1.10 7 september 11, 2002
figure 2

figure 3 figure 1
ht1625 rev. 1.10 8 september 11, 2002 functional description display memory ram structure the static display ram is organized into 128 4 bits and stores the display data. the contents of the ram are di - rectly mapped to the contents of the lcd driver. data in the ram can be accessed by the read, write and read-modify-write commands. the following is a mapping from the ram to the lcd patterns. time base and watchdog timer wdt the time base generator and wdt share the same di - vided (/256) counter. timer dis/en/clr , wdt dis/en/clr and irq en/dis are independent from each other. once the wdt time-out occurs, the irq pin will remain at logic low level until the clr wdt or the irq dis command is issued. if an external clock is selected as the source of system frequency, the sys dis command turns out invalid and the power down mode fails to be carried out until the ex - ternal clock source is removed. buzzer tone output a simple tone generator is implemented in the ht1625. the tone generator can output a pair of differential driv - ing signals on the bz and bz which are used to generate a single tone. command format the ht1625 can be configured by the software setting. there are two mode commands to configure the ht1625 resource and to transfer the lcd display data. $ " $ - $ , $ & $ % & . / % # - , # - & / # " - , & - , % " , . % . 3 & 4 , 4 - 4 " 5 # 3 % 4 / 4 : : : : 4 " 5 & , - " & , - " ram mapping
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timing diagrams read mode (command cod e:110) read mode (successive address reading) ht1625 rev. 1.10 9 september 11, 2002 the following are the data mode id and the command mode id: operation mode id read data 1 1 0 write data 1 0 1 read-modify-write data 1 0 1 command command 1 0 0 if successive commands have been issued, the com - mand mode id can be omitted. while the system is op - erating in the non-successive command or the non-successive address data mode, the cs pin should be set to 1 and the previous operation mode will be re - set also. the cs pin returns to 0 , a new operation mode id should be issued first. name command code function tone off 0000-1000-x turn-off tone output tone 4k 010x-xxxx-x turn-on tone output, tone frequency is 4khz tone 2k 0110-xxxx-x turn-on tone output, tone frequency is 2khz
- - " / . & , - " " - , & - 3 - 5 3 , 5 - - " / . & , - " " - , & 3 - 5 , 3 , 5 % %
- - " / . & , - " " - , & 3 5 3 5 " - , & " - , & " - , & " 3 ; - 5 3 ; , 5 3 ; & 5 %
write mode (command cod e:101) write mode (successive address writing) read-modify-write mode (command cod e:101) read-modify-write mode (successive address accessing) ht1625 rev. 1.10 10 september 11, 2002
- " - / . & , - " " - , & 3 5 3 5 " - , & " - , & " - , & " 3 ; - 5 3 ; , 5 3 ; & 5 %
- " - / . & , - " " - , & - 3 - 5 3 - 5 - " - / . & , - " " - , & , 3 , 5 3 , 5 % %
- " - / . & , - " " - , & - 3 - 5 3 - 5 / . & , - " " - , & , 3 , 5 3 , 5 - " - " - , & 3 - 5 % %
- " - / . & , - " " - , & 3 5 3 5 " - , & " - , & " - , & " 3 5 3 ; - 5 3 ; - 5 - , & " 3 ; , 5 %
command mode (command cod e:100) mode (data and command mode) ht1625 rev. 1.10 11 september 11, 2002

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application circuits note: the connection of irq and rd pin can be selected depending on the requirement of the mcu. the voltage applied to v lcd pin must be lower than v dd . adjust vr to fit lcd display, at v dd =5v, v lcd =4v, vr=15k
20%. adjust r (external pull-high resistance) to fit user s time base clock. instruction set summary name id command code d/c function def. read 110 a6a5a4a3a2a1a0d0d1d2d3 d read data from the ram write 101 a6a5a4a3a2a1a0d0d1d2d3 d write data to the ram read-modify- write 101 a6a5a4a3a2a1a0d0d1d2d3 d read and write data to the ram sys dis 100 0000-0000-x c turn off both system oscillator and lcd bias generator yes sys en 100 0000-0001-x c turn on system oscillator lcd off 100 0000-0010-x c turn off lcd display yes lcd on 100 0000-0011-x c turn on lcd display timer dis 100 0000-0100-x c disable time base output yes wdt dis 100 0000-0101-x c disable wdt time-out flag output yes timer en 100 0000-0110-x c enable time base output wdt en 100 0000-0111-x c enable wdt time-out flag output tone off 100 0000-1000-x c turn off tone outputs yes clr timer 100 0000-1101-x c clear the contents of the time base generator clr wdt 100 0000-1111-x c clear the contents of the wdt stage rc 32k 100 0001-10xx-x c system clock source, on-chip rc oscillator yes ext (xtal) 32k 100 0001-11xx-x c system clock source, external 32khz clock source or crystal oscillator 32.768khz ht1625 rev. 1.10 12 september 11, 2002 * < ) ! +
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name id command code d/c function def. tone 4k 100 010x-xxxx-x c tone frequency output: 4khz tone 2k 100 0110-xxxx-x c tone frequency output: 2khz irq dis 100 100x-0xxx-x c disable irq output yes irq en 100 100x-1xxx-x c enable irq output f1 100 101x-0000-x c time base clock output: 1hz the wdt time-out flag after: 4s f2 100 101x-0001-x c time base clock output: 2hz the wdt time-out flag after: 2s f4 100 101x-0010-x c time base clock output: 4hz the wdt time-out flag after: 1s f8 100 101x-0011-x c time base clock output: 8hz the wdt time-out flag after: 1/2s f16 100 101x-0100-x c time base clock output: 16hz the wdt time-out flag after: 1/4s f32 100 101x-0101-x c time base clock output: 32hz the wdt time-out flag after: 1/8s f64 100 101x-0110-x c time base clock output: 64hz the wdt time-out flag after: 1/16s f128 100 101x-0111-x c time base clock output: 128hz the wdt time-out flag after: 1/32s yes test 100 1110-0000-x c test mode, user don t use. normal 100 1110-0011-x c normal mode yes note: x : don t care a6~a0 : ram address d3~d0 : ram data d/c : data/command mode def. : power on reset default all the bold forms, namely 110 , 101 , and 100 , are mode commands. of these, 100 indicates the command mode id. if successive commands have been issued, the command mode id except for the first command will be omitted. the source of the tone frequency and of the time base or wdt clock frequency can be derived from an on-chip 32khz rc oscillator, a 32.768khz crystal oscillator, or an external 32khz clock. calculation of the frequency is based on the system frequency sources as stated above. it is recommended that the host control - ler should initialize the ht1625 after power on reset, for power on reset may fail, which in turn leads to the mal - functioning of the ht1625. ht1625 rev. 1.10 13 september 11, 2002
package information 100-pin qfp (14 20) outline dimensions symbol dimensions in mm min. nom. max. a 18.80 19.20 b 13.90 14.10 c 24.80 25.20 d 19.90 20.10 e 0.65 f 0.30 g 2.50 3.10 h 3.40 i 0.10 j1 1.40 k 0.10 0.20 0 7 ht1625 rev. 1.10 14 september 11, 2002 - " " 0 - 0 " / - / " & - & " - $ ' @ ! c 9
ht1625 rev. 1.10 15 september 11, 2002 copyright 2002 by holtek semiconductor inc. the information appearing in this data sheet is believed to be accurate at the time of publication. however, holtek as - sumes no responsibility arising from the use of the specifications described. the applications mentioned herein are used solely for the purpose of illustration and holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. holtek reserves the right to alter its products without prior notification. for the most up-to-date information, please visit our web site at http://www.holtek.com.tw. holtek semiconductor inc. (headquarters) no.3, creation rd. ii, science-based industrial park, hsinchu, taiwan tel: 886-3-563-1999 fax: 886-3-563-1189 http://www.holtek.com.tw holtek semiconductor inc. (sales office) 11f, no.576, sec.7 chung hsiao e. rd., taipei, taiwan tel: 886-2-2782-9635 fax: 886-2-2782-9636 fax: 886-2-2782-7128 (international sales hotline) holtek semiconductor (shanghai) inc. 7th floor, building 2, no.889, yi shan rd., shanghai, china tel: 021-6485-5560 fax: 021-6485-0313 http://www.holtek.com.cn holtek semiconductor (hong kong) ltd. rm.711, tower 2, cheung sha wan plaza, 833 cheung sha wan rd., kowloon, hong kong tel: 852-2-745-8288 fax: 852-2-742-8657 holmate semiconductor, inc. 48531 warm springs boulevard, suite 413, fremont, ca 94539 tel: 510-252-9880 fax: 510-252-9885 http://www.holmate.com

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